Potential induced degradation (PID) – a group of mechanisms caused by high voltage and potential difference between the module surface and individual solar cells that can cause damage and power loss to cells after installation – has long been a worry for the solar industry. The worst cases have seen modules lose a large chunk of their performance after a few years in the field, leading to losses for system owners and warranty claims for module manufacturers.
Plenty of fixes for PID are available at module and system level, and several manufacturers have been confident enough to label their modules ‘PID free’ in recent years. Different module technologies, however, are affected differently – and the appearance of bifacial modules in mainstream manufacturing over the past few years has led to warnings of other PID mechanisms, some causing underperformance that could be reversed overnight, and others that caused major, irreversible performance loss to the cells.
Better understanding these mechanisms was the goal of scientists led by Hochschule Anhalt in Germany, who used sophisticated imaging techniques to look into the effects of PID on cells. They report their findings in full in the paper Evolution of Corrosive Potential-Induced Degradation at the Rear Side of Bifacial Passivated Emitter and Rear Solar Cells, published in Rapid research letters.
The study noted a corrosive PID (PID-c) mechanism that could damage passivation layers in the cell, without causing any damage to the surface – altering previous understanding of the mechanisms. “We observed that there is nonreversible PID even if no surface damage is observable, which contradicts the PID-c behavior reported so far in the literature,” the group stated. “These results motivate a more detailed investigation of PID-c on bifacial solar cells and its characterization to be able to distinguish between less harmful, reversible PID-p and harmful, nonvisible, and nonreversible PID-c, which may reduce the reliability of bifacial solar cells drastically.”
The group found that oxidation of the silicon below the passivation layers caused cracks to form when the cell is placed under PID stress, leaving unpassivated areas with much lower electrical performance. “The working hypothesis is that PID-c is due to impurities (Ca, Na, K) in the etching solution used for this process step, making solar cells susceptible to PID-c, as these impurities lead to a high density of surface defects, which supports the formation of Si oxide at the interface of AlOX and Si bulk,” they explain.
Mitigating PID
The group notes that so far no reports of these PID mechanisms from modules in the field are known, although they note that such issues may well be protected by non-disclosure agreements, and also that they may take several years to appear in the field.
Various fixes might be possible in the cell design – adding additional conductive interlayers is one example given by the scientists at HS Anhalt. Until such solutions can be developed, however, they state that updates to testing standards will be key in spotting damage from PID before it’s too late. “Common test protocols are not valid for PID at the rear side. Due to the dynamic nature of PID-p and interaction with illumination, test set up needs to be able to measure possible transient performance,” HS Anhalt researcher Kai Sporleder told pv magazine. “Simultaneous illumination and a tracking of power changes of the solar cells with a temporal resolution of seconds are needed. It must be noted that the current standard protocol can lead to false-PID-results due to the lack of illumination.”
